The traces and interconnects that couple an integrated circuit to external devices have a characteristic impedance that should be matched by the integrated circuit's output driver. If the output driver has an output impedance that is mismatched to the characteristic impedance of the associated circuit board, undesirable effects occur such as jitter and signal reflections. Thus, it is conventional for an integrated circuit output driver to have some configurability so that it may be calibrated to the desired output impedance.
A conventional impedance-calibrated output driver 100 is shown in FIG. 1 that drives an output signal into an output pad 105. To adjust or calibrate an output impedance at pad 105, driver 100 includes a pull-down section 110 and a pull-up section (not illustrated). As suggested by the name, pull-down section 110 functions to ground pad 105 when a complement (datab) of the data output signal is asserted high. Conversely, the pull-up section functions to charge pad 105 to a power supply voltage VDD when the data output signal is high. Both the pull-up section as well as pull-down section 110 includes a number of selectable legs as well as a default leg. In pull-down section 110, each selectable leg may form a current path to ground (VSS) whereas in the pull-up section they may form a current path to a power supply node carrying the power supply voltage VDD.
The default leg in both sections is always conducting regardless of the calibration setting. Thus, the default leg in pull-down section 110 is configured to form a path to ground when the complement data signal datab driving an NMOS data transistor M1 and an enable signal dnvm driving an NMOS transistor M2 are both asserted. But the remaining legs are selectable according to calibration bits dn<0> through dn<4> corresponding to calibration transistors M3 through M7, respectively. There are thus five selectable legs in pull-down section 110 corresponding to the five calibration bits ranging from a leg 0 to a leg 4. Each leg, whether default or selectable, includes an NMOS data transistor M1 having a gate driven by the complement data output signal datab. Thus, when datab goes high, all M1 data transistors are conducting. But each selectable leg will conduct only if the corresponding calibration bit is asserted.
The current drawn by each selectable leg and the default leg depends upon the resistance of each leg's resistor. The default leg includes a resistor R whereas the resistance of the remaining selectable legs depends upon the calibration scheme. A number of calibration schemes may be used to adjust the output impedance for driver 100. For example, in a binary calibration scheme, selectable leg 0 has the largest resistance R0. Each subsequent selectable leg has one half the preceding leg's resistance. Thus, selectable leg 1 has a resistance of R0/2, selectable leg 2 has a resistance of R0/4, selectable leg 3 has a resistance of R0/8, and selectable leg 4 has a resistance of R0/16.
The pull-up section is analogous except that the default leg and the selectable legs couple to VDD instead of VSS and the NMOS transistors are replaced by PMOS transistors. The calibration bits depend upon the particular process corner used to manufacture driver 100. For example, suppose pull-down section 110 must sink a current I to provide the desired output impedance at output pad 105. If all the selectable legs are conducting such as for a slow process corner, that current I is then distributed across the selectable legs as well as the default leg. But at a fast process corner in which none of the selectable legs are conducting, transistors M1 and M2 in the default leg must then conduct the full amount of the desired current I. Resistor R in the default leg must then be of a sufficient size to reduce electromigration issues with regard to its coupling vias. The relatively large amount of current carried by the default leg at the faster process corners thus raises reliability issues from the resulting risk of electromigration. The relatively large resistor size for the default leg then carries over to the other legs. Output driver 100 is thus relatively bulky, which reduces density in the corresponding integrated circuit. This is particularly inefficient in that the resistors for the selectable legs would not even be used in the fast process corners.
Accordingly, there is a need in the art for improved drivers with greater density and improved reliability.